2
IR2175(S) & (PbF)
www.irf.com
Recommended Operating Conditions
The output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended
conditions.
Note 1: Capacitors are required between VB and Vs when bootstrap power is used. The external power supply,
when used, is required between VB and Vs pins.
Symbol Definition
Min.
Max.
Units
V
B
High side floating supply voltage
V
S
+13.0
V
S
+20
V
S
High side floating supply offset voltage
0.3
600
V
PO
Digital PWM output voltage
COM
VCC
V
OC
Overcurrent output voltage
COM
VCC
V
CC
Low side and logic fixed supply voltage
9.5
20
V
IN
Input voltage between V
IN+
and V
S
-260
+260
mV
T
A
Ambient temperature
-40
125
癈
V
Symbol Definition
Min.
Max.
Units
V
S
High side offset voltage
-0.3
600
V
BS
High side floating supply voltage
-0.3
25
V
CC
Low side and logic fixed supply voltage
-0.3
25
V
IN
Maximum input voltage between V
IN+ and
V
S
-5
5
V
PO
Digital PWM output voltage
COM -0.3
VCC +0.3
V
OC
Overcurrent output voltage
COM -0.3
VCC +0.3
dV/dt
Allowable offset voltage slew rate
50
V/ns
P
D
Package power dissipation @ T
A
d +25癈
8 lead SOIC
.625
8 lead PDIP
1.0
Rth
JA
Thermal resistance, junction to ambient
8 lead SOIC
200
8 lead PDIP
125
T
J
Junction temperature
150
T
S
Storage temperature
-55
150
T
L
Lead temperature (soldering, 10 seconds)
300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
V
癈/W
W
癈
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